Interface circuit between two circuits of different logic types
US5045727A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 15, 1990 |
| Grant date | Sep 3, 1991 |
| Priority date | — |
| Expiry date | Jun 15, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018535
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
This interface constitutes an adaptation of the output signals of a first circuit, made of silicon for example, to the limit values of the input signals in a second digital circuit, made of GaAs for example. It includes a first stage (A) consisting of two parallel-mounted shifters, in which the input signal (E) and a reference (Ref) are shifted. A second stage (B), of the BFL type, compares these two values and a third stage (C) regenerates and amplifies the signals. A fourth stage (D) may give a complementary value. This interface is integrated into the chip of the second digital circuit which is made of GaAs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.