Pattern data processing method
US5046012A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Jun 15, 1989 |
| Grant date | Sep 3, 1991 |
| Priority date | — |
| Expiry date | Jun 15, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/398
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A pattern data processing method processes hierarchical pattern data which has a hierarchical structure and describes in each level thereof one or a plurality of internal cells constituting one or a plurality of logic blocks of a semiconductor integrated circuit device which is to be produced. The pattern processing method comprises the steps of defining a frame at a boundary between a level i of the hierarchical structure and a level i+1 which is higher than the level i, cutting a first portion of a pattern which protrudes out of the frame form the level i to the level i+1 and defining the cut, first portion as a pattern of the level i+1, cutting a second portion of a pattern which protrudes out of the frame from the level i+1 to the level i and deleting the cut, second portion, and repeating the steps of cutting the first and second portions for a predetermined number of levels for increasing values of i, where i=1, 2, . . . , n, n is an arbitrary integer and the pattern of the semiconductor integrated circuit device is described in a highest level n+1.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.