Microprogram control apparatus using don't care bits as part of address bits for common instructions and generating variable control bits
US5046040A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 30, 1986 |
| Grant date | Sep 3, 1991 |
| Priority date | — |
| Expiry date | Dec 30, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/268
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A microprogram control device comprises a machine instruction decoder (11) for sequentially decoding machine instructions fetched from an external computer memory and providing a microcode start address for each decoded instruction, a counter (12) connected to the decoder for generating a required number of microcode addresses, a microcode storage unit (13) comprising an address decoding area (13a) in which microcodes are designated by microcode address and a microcode memory area (13b) in which the microcodes associated with the machine instructions are stored, and a microcode register (14) for controlling the operation of circuits (25) to be controlled and for providing a control signal output (Sc) to the counter. A "don't care" function is associated with certain bit positions of microcode addresses of microsteps common to sequential machine instructions. In this manner memory chip area may be reduced without any decrease in microcomputer operating speed. Nevertheless, the embodiment may further provide for designation of branching operations via incorporation of a next microinstruction address determination circuit coupled between the machine instruction decoding circuit and th…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.