Multi-processor system testing method
US5046068A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 18, 1989 |
| Grant date | Sep 3, 1991 |
| Priority date | — |
| Expiry date | Apr 18, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2215
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In testing the fault handling function of a multi-processor system including a master processor, a slave processor, a storage control unit shared by these processors, and a service processor, the master processor and the slave processor cooperate to synchronize with each other issuing to the storage control unit successive storage access requests all designating the same storage area. The master processor also requests the service processor to generate a pseudo-fault in the above-mentioned storage area while these access requests are being successively issued in synchronism. Upon detecting a fault, the master processor collects and examines fault information, and outputs it when an abnormal result is detected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.