Patent · US Expired

Integrated circuit comprising a signal level converter

US5047657A · kind A · utility

24Cited by
8References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 1, 1989
Grant dateSep 10, 1991
Priority date
Expiry dateSep 1, 2009

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K19/01707
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

An integrated circuit which includes a converter for converting a logic input signal of a first logic type into a logic output signal of a second logic type, for example, from ECL to CMOS level. The converter comprises a buffer, including a controllable load and a driver transistor, and a control circuit. The load is controlled as a function of a control voltage and a reference voltage which are externally applied so that the output signal is substantially equal to the reference voltage if the input signal is substantially equal to the control voltage. In one embodiment the control circuit is a copy of the buffer and receives the control voltage at its input. Its load is controlled by a differential amplifier whose inputs receive the reference voltage and the output voltage of the control circuit. A CMOS-SRAM comprising ECL/CMOS level converters of the above kind communicates with fast ECL circuits and has a low energy consumption.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.