Alignment--registration tool for fabricating multi-layer electronic packages
US5048178A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 23, 1990 |
| Grant date | Sep 17, 1991 |
| Priority date | — |
| Expiry date | Oct 23, 2010 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/53091
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a method of forming a multilayer microelectronic circuit package. According to the disclosed method, the first layer of the package has features that are brought into proximity to an optical system which is adapted for imaging a surface of the layer. The optical system images features on the surface of the first layer, and generates targets around selected ones of the features. The, the next layer of the circuit package is brought into proximity to the optical system. This next layer is moved, i.e., translated and rotated, until selected features of the layer coincide with the targets generated through the optical system. This next layer is then placed atop the previous layer. Finally, the layers are laminated to form the multilayer microelectronic circuit package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.