Electronically reconfigurable digital pad attenuator using segmented field effect transistors
US5049841A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 11, 1990 |
| Grant date | Sep 17, 1991 |
| Priority date | — |
| Expiry date | Jul 11, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H11/245
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An electronically reconfigurable digital pad attenuator is disclosed using selectively controlled segmented field effect transistors in a passive, non-gain state as the principal impedance elements. The attenuator may be fabricated in the monolithic microwave integrated circuit (MMIC) format with a segmented gate field effect transistor being connected in each of the separate branches of a Pi pad, Tee pad, or Bridged Tee pad attenuator configuration. The individual FET segments are maintained in a high admittance "ON" state or a low admittance "OFF" state in accordance with the binary control potentials applied to the gate of each segment, the principal electrodes being maintained at a zero potential difference. The attenuation then becomes a function of the binary gate potentials applied to each segment and assumes one of a set of well-defined discrete values. The attenuator consumes minimum power, provides attenuation steps that are independent of GaAs MMIC fabrication process tolerances, i.e. lot to lot stable, is wide band, is well matched at input and output terminals, and facilitates setting nominal gain in microwave and millimeter wave subsystems while minimizing transmissio…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.