Multi-processor computer system having self-allocating processors
US5050070A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 29, 1988 |
| Grant date | Sep 17, 1991 |
| Priority date | — |
| Expiry date | Feb 29, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/173
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system comprises a plurality of independent processors which can either execute a separate process for each processor, or execute parallel process operations across multiple processors for one process. The computer system includes a set of communication registers divided into a group of frames and a set of semaphores which correspond respectively to the registers. Typical processes have both serial and parallel code segments. During serial execution, a process is executed by a single processor, but when a parallelization instruction is encountered, which indicates that code can be executed in parallel, a semaphore is posted to invite other processors to join in parallel execution of the process. If any other processors in the system are idle, those processors detect the semaphore and accept a thread of process operation. Two or more processors may join in parallel operation if sufficient operations are available. However, if all processors are busy, then the processor conducting the serial operation will also execute all of the parallel operations. Thus, the processors are self-allocated, rather than being used on a demand or master-servant basis. This permits a greater …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.