Area-efficient low-power bipolar current-mode logic
US5051621A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 4, 1990 |
| Grant date | Sep 24, 1991 |
| Priority date | — |
| Expiry date | May 4, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/288
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Current mode logic configuration circuits are shown for use with linear integrated circuit chips. The circuits employ plural collector lateral transistors to provide logic current source outputs in response to logic current inputs that are accepted by NPN transistor current mirrors acting as current sinks. Conventional logic functions are detailed and a toggle flip-flop configuration is shown being composed of the basic logic gates. Since the disclosed current mode voltage swings are small the circuit speed is relatively high at a given shunt capacitance. Die surface area is low with many transistors sharing common n-epitaxial tubs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.