Recycling DCT/IDCT integrated circuit apparatus using a single multiplier/accumulator and a single random access memory
US5053985A · kind A · utility
95Cited by
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5Claims
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Key dates
| Filing date | Oct 19, 1989 |
| Grant date | Oct 1, 1991 |
| Priority date | — |
| Expiry date | Oct 19, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T9/007
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A discrete cosine transform/inverse discrete cosine transform or DCT/IDCT integrated circuit capable of performing both DCT and IDCT, includes a processor for processing DCT/IDCT data including, input buffer and arithmetic logic unit for processing incoming data and first pass processed data, multiplier and accumulator unit for performing mathematical operations on DCT/IDCT data, and output buffer and arithmetic logic unit for processing first pass processed data and outgoing data. Also provided is an interleaved random access memory for storing DCT/IDCT data during various stages of processing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.