Fractional N/M synthesis
US5055800A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 30, 1990 |
| Grant date | Oct 8, 1991 |
| Priority date | — |
| Expiry date | Apr 30, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/10
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A frequency synthesizer having a frequency divider and a frequency multiplier in the feedback loop is disclosed. The minimum frequency separation between two adjacent synthesized channels is equal to the reference frequency divided by the multiplication ratio of the multiplier. The division ratio of the frequency divider, which can be analyzed as the sum of an integer and a fractional portion, is varied with time by a digital sequence, resulting in a minimum frequency increment equal to a fraction of the reference frequency. The multiplier acts to reduce the nonlinearities of the frequency synthesizer when the fractional portion of the division ratio causes a large variation in the instantaneous division ratio by reducing the effective division ratio of the loop.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.