Method for reliability testing integrated circuit metal films
US5057441A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 29, 1990 |
| Grant date | Oct 15, 1991 |
| Priority date | — |
| Expiry date | Oct 29, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Disclosed is a method for manufacturing an integrated circuit which includes the step of evaluating the reliability of metal films in the circuit using a noise measurement technique. In one embodiment, a film portion to be tested is incorporated in a Wheatstone bridge. A relatively large direct current is passed through the film to stimulate 1/f.sup.2 noise. A relatively small alternating current is concurrently passed through the film. The bridge imbalance signal at the ac frequency is amplified and demodulated by a phase-locked amplifier, and is then frequency analyzed. The film is evaluated by comparing the resulting noise power spectrum with predetermined standards.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.