Multiple processor system having a correspondence table for transferring processing control between instruction processors
US5062046A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 20, 1990 |
| Grant date | Oct 29, 1991 |
| Priority date | — |
| Expiry date | Mar 20, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/468
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multiple processor system composed of a plurality of instruction processors allows a plurality of its subsystems for performing data processing in each unit to be operable simultaneously with and parallel to each other in each of the instruction processors. The multiple processor system has a processor designation table and a control processing subsystem. As the processor designation table specifies correspondence relation between a subsystem accessing to each input-output resource and the instruction processor executing the subsystem, the processing control subsystem transfers control of the processing to the instruction processor to be designated by the processor designation table in accordance with the subsystem to be used with reference to the processor designation table during execution of the data processing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.