Method and apparatus for enabling a memory
US5062080A · kind A · utility
5Cited by
3References
4Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 3, 1987 |
| Grant date | Oct 29, 1991 |
| Priority date | — |
| Expiry date | Aug 3, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and device for enabling writes to a memory unit. The memory write device, such as a microprocessor (11), must provide a predetermined sequence of addresses to an address decoding unit (13), which then passes along the decoded addresses to a memory write enable unit (14). If the correct sequence, and only the correct sequence, is so provided, the memory write enable unit (14) will provide an enable signal (16) to the memory (12), thereby allowing the microprocessor (11) to write to the memory (12). A timer (26) can be utilized to limit the enable window.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.