Neuram: neural network with ram
US5063521A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 3, 1989 |
| Grant date | Nov 5, 1991 |
| Priority date | — |
| Expiry date | Nov 3, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F18/2135
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A random access memory (RAM) circuit is provided wherein an input signal matrix forming an identifiable original pattern is learned and stored such that a distorted facsimile thereof may be applied to generate an output signal matrix forming a replication of the original pattern having improved recognizable features over the distorted facsimile. The input signal matrix is logically divided into a plurality of predetermined subsets comprising a unique element of the input signal matrix and the elements in the neighborhood thereof. Each predetermined subset is quantized into a first digital address and applied at the address inputs of a memory circuit for retrieving data stored in the addressed memory location, while one signal of the predetermined subset is digitized and weighted and combined with the data retrieved from the addressed memory location for storage in the same addressed memory location. Next, a plurality of second digital addresses is generated including predetermined combinations of the first digital address perturbed at least one bit and sequentially applied at the address inputs of the memory circuit whereby the steps of digitizing and weighting one signal of the pr…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.