Reconfigurable deinterleaver/interleaver for block oriented data
US5063533A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 10, 1989 |
| Grant date | Nov 5, 1991 |
| Priority date | — |
| Expiry date | Apr 10, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/2789
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A reconfigurable deinterleaver for deinterleaving up to N interleaved codewords, each up to M bits in length comprises a memory array, a memory for storing predetermined deinterleaver parameters, a controller, and column and row selector means. The memory array is configured with N bit rows by M bit columns, and is capable of selectably deinterleaving interleaved codewords. The predetermined deinterleaver parameters define the number and length of the interleaved codewords to be deinterleaved. The controller is responsive to the deinterleaver parameters for controlling the writing of interleaved codewords into the memory array and for reading deinterleaved codewords from the memory array. Column and row selector means provide for writing interleaved codewords into, and reading deinterleaved codewords from only a portion of the memory array when smaller data blocks are deinterleaved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.