Differential amplifying circuit operable at high speed
US5065111A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 8, 1990 |
| Grant date | Nov 12, 1991 |
| Priority date | — |
| Expiry date | Jun 8, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45641
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A differential amplifying circuit includes a differential input portion, a load portion, a switching portion, and a constant current source. The differential input portion is connected to the constant current source, and includes a pair of field effect transistors (FETs), with one having a gate for receiving an input voltage, a source connected to the current source and a drain connected to a first node, and the other having a gate for receiving a reference voltage, a source connected to the current source and a drain connected to a second node. The load portion includes a pair of FETs, with one having a drain connected to a first power source and a source connected to a first output terminal, and the other having a drain connected to the first power source and a source connected to a second output terminal. The switching portion includes a pair of FETs, with one having a source connected to the first output terminal, and the other having a source connected to the second output terminal. The pair of FETs of the load portion respond to the potentials of the first and second nodes, respectively, so that the switching portion can perform a high speed switching operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.