Semiconductor memory cell and method of manufacturing the same
US5065215A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 22, 1990 |
| Grant date | Nov 12, 1991 |
| Priority date | — |
| Expiry date | Jun 22, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/377
Abstract
A semiconductor memory includes a plurality of semiconductor memory cells formed in a matrix form on a semiconductor substrate, each semiconductor memory cell having a memory cell including a trench capacitor, a bit line, and a word line extending perpendicularly to the bit line. The word lines of semiconductor memory cells adjacent in a direction of the bit lines substantially vertically overlap each other. A method of manufacturing the above semiconductor memory includes the steps of forming a first word line of a given semiconductor memory cell, and forming a second word line of a semiconductor memory cell adjacent to the given semiconductor memory cell in a direction of the bit line on the first word line, so that the second word line overlaps the first word line in a substantially insulated state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.