Stabilization and calibration of precision electronic circuit component
US5065351A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 1989 |
| Grant date | Nov 12, 1991 |
| Priority date | — |
| Expiry date | Mar 30, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/304
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A technique for stabilization and calibration of precision analog circuit components such as amplifiers. A sample and hold circuit is placed in the feedback loop of the component. The input of the component is periodically coupled to reference voltage while the sample and hold circuit is set to a sample mode. Any offset voltage at the output of the component is then fed, through the sample and hold circuit, back to a summing node formed at the input, and thus automatically canceled. This sequence is periodically repeated at convenient times, to keep the sample and hold circuit properly charged, and to compensate for changes in operating conditions over time. The transfer function of the component can be determined by a circuit which periodically measures its response to a series of known input voltages. The exact value of the voltage input to the component is known, since any offset is automatically canceled by the operation of the sample and hold circuit. After the response of the component to a number of inputs is measured in this way, its transfer function is determined using a method such as LaGrangian interpolation. During normal operation of the component on the analog input …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.