Clock signal generating circuit for a data storing and reproducing system
US5065384A · kind A · utility
14Cited by
2References
3Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 5, 1988 |
| Grant date | Nov 12, 1991 |
| Priority date | — |
| Expiry date | Dec 5, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B20/1879
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A clock signal producing circuit for a data storing and reproducing system in which a reference clock signal having a predetermined frequency is generated, a first sync-signal detection signal is generated when the time between two adjacent pulses in the input signal which is measured by the reference clock signal becomes equal to the predetermined reference value, the clock edge pulse is separated from the input signal using the first sync-signal detection signal and then outputted, and a reproducing clock signal having a predetermined frequency coinciding with the generating timing of the separated clock edge pulse is generated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.