Method for fast frequency acquisition in a phase locked loop
US5068625A · kind A · utility
14Cited by
1References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 14, 1990 |
| Grant date | Nov 26, 1991 |
| Priority date | — |
| Expiry date | Dec 14, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/085
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The method of the present invention provides fast frequency acquisition in a PLL. The peak voltage for a phase error signal is detected at time t.sub.p and a voltage controlled oscillator warp voltage is sampled at t.sub.p. The new warp voltage to the voltage controlled oscillator is set to what the warp voltage was at t.sub.p. The bandwidth of the loop is then narrowed and the warp voltage is averaged over a number of samples. The warp voltage is then set to the average warp voltage and the loop bandwidth is widened.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.