Patent · US Expired

High speed multiplier which divides multiplying factor into parts and adds partial end products

US5070471A · kind A · utility

6Cited by

5References

17Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Son Dao-Trong · Stuttgart, DE
Klaus J. Getzlaff · Schenefeld, DE
Klaus Helwig · Sindelfingen, DE

Key dates

Filing date	Feb 9, 1990
Grant date	Dec 3, 1991
Priority date	—
Expiry date	Feb 9, 2010

Classification

Technology area (CPC G)Physics
CPC primaryG06F7/5338
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A multiplier for multiplying two binary operands is presented which comprises an encoding unit, a multiplying unit composed of two multiplying arrays, and a logic unit. The encoding unit to which the second operand is applied generates factors following the Booth algorithm. The two multiplying arrays are respectively applied with the first operand as well as with factors belonging to the higher significance digits or the lower significance digits, respectively, of the second operand. In both multiplying arrays the multiplication of the factors with the first operand into a respective partial end product is simultaneously performed. Both partial end products are applied to the logic unit which generates therefrom the end product in accordance with the algorithm used at the beginning.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.