Analog/digital converter operating by the expanded parallel method
US5072220A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 14, 1991 |
| Grant date | Dec 10, 1991 |
| Priority date | — |
| Expiry date | Feb 14, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/146
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog/digital converter assembly includes a first analog/digital converter having N-bit resolution, operating by the parallel method and having comparators. A sample and hold element is connected upstream of the first analog/digital converter. A second analog/digital converter has M-bit resolution, operates by the parallel method and has comparators. A digital/analog converter is connected upstream of the second analog/digital converter. A subtractor is connected to the digital/analog converter and to the sample and hold element. An amplifier is connected downstream of the subtractor. Output signals of the comparators of the first analog/digital converter are provided directly with a 1.sup.x out of 2.sup.N code for triggering the digital/analog converter. The same reference voltage is applied to both the first analog/digital converter and the digital/analog converter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.