Method and apparatus for recovering from an incorrect branch prediction in a processor that executes a family of instructions in parallel
US5072364A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 1989 |
| Grant date | Dec 10, 1991 |
| Priority date | — |
| Expiry date | May 24, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3853
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A branch recovery mechanism completes the processing of a concurrently issued family of instructions depending on the location of the branch instruction in the family and on whether the branch was correctly predicted. If the branch was not correctly predicted, the writes and stores of instructions in the family the precede the branch instruction are completed and those instructions are retired. However, the writes and stores of the instructions in the family following the branch instruction are inhibited.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.