Watchdog circuit for monitoring programs and detecting infinite loops using a changing multibit word for timer reset
US5073853A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 2, 1987 |
| Grant date | Dec 17, 1991 |
| Priority date | — |
| Expiry date | Nov 2, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/0757
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system includes a microcomputer (1) provided with an address latch (5). The microcomputer is provided with a watch-dog arrangement which comprises the usual clocked counter (17) an output (Qn) of which is coupled to a reset input (RST) of the microcomputer. In order to increase the number of malfunctions to which the watch-dog responds the microcomputer is arranged to repeatedly generate reset signals each in the form of a complete byte X or Y which alternate. These are applied to an input (30) of a comparator (10) which compares them with identical bytes fed to a further input 31 via a switched multiplexer (13), the comparator output (37) being connected to a reset input (RS) of the counter. Each time this occurs the microcomputer strobes the watch-dog by applying its address to a further input (46, 22). If the byte applied to the comparator input (30) is incorrect and/or if this application does not occur within a time window defined by a period during which a further output (Qn-1) of the counter is logic " 1" the resulting level at the comparator output (37), stored in a flip-flop (15), resets the microcomputer. The state of the signal at the further output (Qn…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.