Vector processing apparatus allowing succeeding vector instruction chain processing upon completion of decoding of a preceding vector instruction chain
US5073970A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Jan 24, 1990 |
| Grant date | Dec 17, 1991 |
| Priority date | — |
| Expiry date | Jan 24, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8076
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A vector processing apparatus includes a vector processing unit having a vector instruction decoder and a scalar processing unit including a scalar instruction decoder for activating the vector processing unit in response to a scalar instruction commanding initiation of the processing of a vector instruction chain. The vector processing unit further includes an incidation register which is set in response to the initiation of decodiung of the vector instruction chain by the vector instruction decoder and reset in response to the decoding of an end vector instruction of the vector instruction chain. So long as the indication circuit is in the reset state, the vector processing unit is allowed to initiate the processing of a vector instruction chain under the command of the scaler processing unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.