Circuit for converting an ECL signal into a CMOS signal
US5075580A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 6, 1990 |
| Grant date | Dec 24, 1991 |
| Priority date | — |
| Expiry date | Sep 6, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/013
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit for converting ECL logic level signals to CMOS logic level signals comprises a differential amplifier defining first and second current paths that are connected to a negative reference potential level. When the ECL input signal is logical zero, the first current path is non-conductive and the second path is conductive, and vice versa when the input signal is logical one. A first transistor has its base connected to the first current path, its emitter connected to a positive reference potential level, and its collector connected to the second current path. A second transistor has its base connected to the second current path, its emitter connected to the output terminal, and its collector connected to a ground reference potential level. A pull-up resistor is connected between the collector and emitter of the first transistor. The second current path includes the collector-emitter path of a third transistor, which has its base connected to the ground reference potential level and its collector connected to the base of the second resistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.