Schottky-diode emulator for BiCMOS logic circuit
US5077490A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 30, 1991 |
| Grant date | Dec 31, 1991 |
| Priority date | — |
| Expiry date | Jan 30, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/0422
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A BiCMOS logic circuit with Schottky-diode emulator is formed from three NMOS field-effect transistors, a PMOS field-effect transistor, a npn bipolar transistor and a load element. First and second NMOS transistors and the PMOS transistor are connected serially between ground and a positive supply voltage. The input signal to the circuit is connected to the gate of the first NMOS transistor and the gate of the PMOS transistor, each of which sits on an opposite side of the second NMOS transistor. The drain and gate of the second NMOS transistor are connected to each other and to the drain and gate of the third NMOS transistor. The drain of the first NMOS transistor is connected to the base of the npn transistor, which has its collector connected through a load to the supply voltage. The source of the third NMOS transistor is also connected to the collector of the npn transistor. In this circuit, the second and third NMOS transistors act together to provide a feedback to limit the maximum base voltage experienced by the npn transistor when the input signal to the circuit goes low, thereby serving a similar function to that served by Schottky diodes in some bipolar circuits. A complem…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.