Probabilistic inference gate
US5077677A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 12, 1989 |
| Grant date | Dec 31, 1991 |
| Priority date | — |
| Expiry date | Jun 12, 2009 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S706/90
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present system performs linear transformations on input probabilities and produces outputs which indicate the likelihood of one or more events. The transformation performed is a product of linear transforms such as P.sub.o =[A.sub.j P.sub.j +B.sub.j ].multidot.[A.sub.k P.sub.k +B.sub.k ] where P.sub.j and P.sub.k are input probabilities, P.sub.o is an output event probability and A.sub.j, B.sub.j, A.sub.k and B.sub.k are transformation constants. The system includes a basic processing unit or computational unit which performs a probabilistic gate operation to convert two input probability signals into one output probability signal where the output probability is equal to the product of linear transformations of the input probabilities. By appropriate selection of transformation constants logical and probabilistic gates performing the functions of AND, NAND, OR, NOR, XOR, NOT, IMPLIES and NOT IMPLIES can be created. The basic unit can include three multipliers and two adders if a discrete component hardwired version is needed for speed or a single multiplier/adder, associated storage and multiplex circuits can be used to accomplish the functions of the hardwired version for econ…
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