Dynamic random access memory
US5077693A · kind A · utility
153Cited by
7References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 1, 1990 |
| Grant date | Dec 31, 1991 |
| Priority date | — |
| Expiry date | Aug 1, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4076
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A DRAM is operated based upon an external clock input, a column enable, and a row enable. The DRAM is accessed and row and column addresses are latched into buffers based upon the clock input.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.