Finite impulse response (FIR) filter using a plurality of cascaded digital signal processors (DSPs)
US5081604A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 18, 1989 |
| Grant date | Jan 14, 1992 |
| Priority date | — |
| Expiry date | Sep 18, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H17/06
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An FIR digital filter device of the symmetrical coefficient type or the antisymmetrical coefficient type or which processes digital data signals such as digital audio signals. In the FIR digital filter device, a digital input data is transferred in the forward direction through a plurality of digital signal processors (F, B) connected in cascade and is then transferred in the reverse direction to form M pieces of delayed digital data. The digital signal processor in each stage effects the algebraic addition of said delayed digital data and the digital input data through a first operation unit (46), effects the multiplication result through a multiplier (47), adds up the multiplied result through a second operation unit (37), and transfers the obtained data as carry-over data to the next stage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.