Fault-tolerant serial attachment of remote high-speed I/O busses
US5081624A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 29, 1989 |
| Grant date | Jan 14, 1992 |
| Priority date | — |
| Expiry date | Dec 29, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L12/42
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A redundant, fault-tolerant connection is provided from a local processing station to a plurality of remote processing stations, each including an I/O bus and an associated I/O bus interface logic circuit. Two of the bus interface logic circuits are connected directly to the processor interface circuit, via separate direct links. Intermediate bus interface circuits of and I/O busses of intermediate remote stations are connected between the two selected bus interface circuits, in a series arrangement including alternate link segments and bus interface circuits. Each of the bus interface circuits has pass-through capability for transmitting data in either direction, and the links and link sections also are bidirectional, enabling transmission of data in either direction and on either path between the processor interface circuit and any of the remote stations, through any intervening stations. The processor interface circuit itself is intentionally configured without such pass-through capability.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.