Thin film transistor panel and manufacturing method thereof
US5084905A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 2, 1989 |
| Grant date | Jan 28, 1992 |
| Priority date | — |
| Expiry date | Oct 2, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/13439
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A thin film transistor panel has a substrate on which a plurality of electrode lines are aligned in a matrix form, thin film transistors which are formed on crossing portions of the plurality of the electrode lines, a diffusible insulating film for covering said thin film transistors, and metal-diffused layers and are connected to source electrodes. The metal-diffused layers are formed by diffusing a metal into predetermined areas of said insulating film. If the metal-diffused layers are used as the pixel electrodes, high density display can be obtained due to the fine pixel electrodes. In addition, a manufacturing method of thin film transistor panel having the steps of forming gate electrode on a substrate, forming gate insulating films on the gate electrodes, forming semiconductor layers on said gate insulating films, forming source and drain electrodes on said semiconductor layers except for channel portions, forming a diffusible insulating film which covers the whole surface of the substrate, providing contact holes in said insulating film corresponding to said source electrodes, and forming metal-diffused layers by diffusing a metal into the insulating film and inner surfaces…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.