Solid modelling system with logic to discard redundant primitives
US5086495A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 16, 1988 |
| Grant date | Feb 4, 1992 |
| Priority date | — |
| Expiry date | Dec 16, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T17/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A solid modelling system for generating a spatial representation of an object defined by a structure having a plurality of linked nodes representing the object in terms of solid geometric primitives combined by a logical expression, which is adapted to recognize redundant primitives automatically. Bitmap generation logic (BGL) is provided for traversing at least certain of the nodes in the structure for generating a bitmap representing the part of the logical expression defined in the traversed nodes and redundant primitive logic (RPL) is provided for testing the bitmap for logical redundancies indicative of redundant geometric primitives. Each bit in the bitmap is representative of a respective one of the constituents of the primitives, a constituent being the volume formed by the intersection of primitives or their complements, and, in order to test for the redundancy of a primitive u, the RPL tests for equivalence of the corresponding utrue and ufalse constituents in the bitmap. The BGL additinally generates a table of pointers to the primitives encountered during the traversal and the RPL deletes from the table a pointer to a primitive which is found to be redundant. Node gener…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.