DC calibration system for a digital-to-analog converter
US5087914A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 22, 1990 |
| Grant date | Feb 11, 1992 |
| Priority date | — |
| Expiry date | Aug 22, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/50
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A calibration system for a digital-to-analog converter (DAC) includes a digital portion (10) having a interpolation section (14) for receiving the digital input and increasing the sampling frequency thereof for input to a delta-sigma modulator (16). A summing junction (24) is disposed between the interpolation circuit (14) and the delta-sigma modulator (16) to allow an offset voltage to be summed therewith. The offset value is stored in an offset register (26), which is controlled by a calibration control circuit (40). The output of the delta-sigma modulator (16) is input to an analog section (12), which is comprised of an analog filter (22) and an output amplifier (28). The output amplifier (28) is operable to sample the output of the analog filter (22) and feed this back to a gate (38). The gate (38) is activated during a calibration cycle to feed the comparator output back to the calibration control circuit (40). During the calibration cycle, the output is isolated by an isolation amplifier (32 ) and the analog output pad connected to ground by a switch (44) to provide a low impedance output on the analog output. The calibration control circuit (40) is operable to perform a bina…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.