Semiconductor memory device
US5089869A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 7, 1990 |
| Grant date | Feb 18, 1992 |
| Priority date | — |
| Expiry date | Aug 7, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/318
Abstract
Disclosed is a semiconductor memory device comprising a semiconductor substrate on which memory cells are formed, each including a switching transistor formed on the semiconductor substrate and a capacitor disposed above the switching transistor. The capacitor has a storage electrode, a cell plate and a capacitor insulating film sandwiched therebetween. The storage electrodes of at least two adjacent memory cells are partly disposed one above the other, with part of the cell plate interposed therebetween. Also disclosed is a semiconductor memory device in which the capacitors of the memory cells are disposed in a trench formed in the semiconductor substrate. The two switching transistors of two adjacent memory cells are located on each island-shaped active region surrounded by the trench. The storage electrodes of the capacitors of the two adjacent memory cells extend side by side around the corresponding active region, with part of the cell plate interposed between the storage electrodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.