RAM based events counter apparatus and method
US5089957A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 14, 1989 |
| Grant date | Feb 18, 1992 |
| Priority date | — |
| Expiry date | Nov 14, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/88
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system, for counting the occurrence of a plurality of system events and for prioritizing the order in which count values are to be incremented, receives a plurality of data signals (15) where each signal is associated with a system event. The data signals (15) are stored in a storage register (16). A memory device (12) stores a plurality of count values, where one count value is associated with each system event to be counted. Each count value is stored in a preselected memory location. The storage register (16) also receives a feedback signal (32) to update the signals (15) stored in the register (16). The storage register (16) generates a plurality of signals (19) which are input to a priority decoder (14) and the priority decoder (14) generates a priority signal (32) to address the location in the memory device (12) where the count value to be accessed is stored. The addressed count value (62) is input to an incrementor (22) where it is incremented and the incremented count value is stored in the memory device (12). The system may also include a multiplexer (90) to select the address signal (92) used to address the memory device (12), and temporary storage devices (80, 100) fo…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.