Method of late programming MOS devices
US5091328A · kind A · utility
149Cited by
5References
30Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 21, 1989 |
| Grant date | Feb 25, 1992 |
| Priority date | — |
| Expiry date | Nov 21, 2009 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/923
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Method for late programming of MOS integrated circuit devices. A second or third level conductive layer is used as a device selection mask for transporting dopant from a doped gate (formed from a first level conductive layer) into the channel region of selected field effect transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.