Heterostructure field effect transistor
US5091759A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 26, 1990 |
| Grant date | Feb 25, 1992 |
| Priority date | — |
| Expiry date | Nov 26, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/204
Abstract
A heterostructure field effect transistor having a buffer layer comprising a first compound semiconductor material. A layer of second semiconductor material different from the first material is formed over the buffer layer. The second layer has a total thickness less than 250 .ANG.. A doped third semiconductor layer formed over the second layer. The net has a dopant concentration in the second layer is greater than the net dopant concentration in the third layer. A gate layer is positioned over the third layer. In a preferred embodiment the second layer is a pulse-doped pseudeomorphic material. There is also provided a method for making the heterostructure field effect transistor. A doped pseudomorphic semiconductor layer of a first conductivity type is formed between first and second other semiconductor layers, the second layer including a net dopant concentration of the first conductivity type. A Schottky gate electrode is formed in contact with the second layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.