Single-chip microcomputer including an EPROM capable of accommodating different memory capacities by address boundary discrimination
US5093909A · kind A · utility
19Cited by
12References
8Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 14, 1989 |
| Grant date | Mar 3, 1992 |
| Priority date | — |
| Expiry date | Dec 14, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/7814
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A single-chip microcomputer includes therein an electrically programmable read-only memory (EPROM) including a specific cell of the EPROM storing an item of information for discrimination of memory space. When a reset signal is applied for initializing the single-chip microcomputer, the specific cell of the EPROM is selected and read out, and further latched in a latch circuit. On the basis of the content of the latch circuit, the single-chip microcomputer discriminates and sets a boundary between an internal memory and an external memory during programmed operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.