Computer address modification system using writable mapping and page stores
US5101339A · kind A · utility
21Cited by
20References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 23, 1989 |
| Grant date | Mar 31, 1992 |
| Priority date | — |
| Expiry date | Jan 23, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1081
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system includes a computer address modification system that is advantageously coupled in a bus network to selectively translate memory address data in 16K blocks and provide DMA addresses which may match the 16 K memory address blocks. The modification system includes a mapping RAM selectively providing translated addresses to enable addresses in a 16 megabyte extended address space. The modification system also includes a page register storing for each addressable 16K block of data for each DMA channel a page address within the extended address space.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.