Analog hardware for delta-backpropagation neural networks

US5101361A · kind A · utility

Assignee

• The United States of America as represented by the Administrator of the National Aeronautics and Space Administration · US

Inventor

• Silvio P. Eberhardt · Pasadena, US

Key dates

• Filing date: Sep 29, 1989
• Grant date: Mar 31, 1992
• Expiry date: Sep 29, 2009

Classification

• Technology area (CPC G): Physics
• CPC primary: G06N3/065
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

This is a fully parallel analog backpropagation learning processor which comprises a plurality of programmable resistive memory elements serving as synapse connections whose values can be weighted during learning with buffer amplifiers, summing circuits, and sample-and-hold circuits arranged in a plurality of neuron layers in accordance with delta-backpropagation algorithms modified so as to control weight changes due to circuit drift.