Integrated circuit device provided with test mode function
US5103167A · kind A · utility
21Cited by
2References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 24, 1990 |
| Grant date | Apr 7, 1992 |
| Priority date | — |
| Expiry date | Aug 24, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31701
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An integrated circuit device provided with test mode function has a plurality of terminals used for receiving and/or feeding out signals during a normal operation of the device. At least one terminal of the plurality of terminals are connected to a register for storing test mode setting data applied through the at least one terminal during a reset cycle period of the device. In accordance with the test mode setting data stored in the register, a setting of a predetermined test mode of the device is executed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.