Method of planarizing a dielectric formed over a semiconductor substrate
US5104828A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 1, 1990 |
| Grant date | Apr 14, 1992 |
| Priority date | — |
| Expiry date | Mar 1, 2010 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/959
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
An improved method for planarizing the surface of an dielectric deposited over a semiconductor substrate. The substrate is pressed face down against a table which has been coated with an abrasive material. In this way, the upper surface of the interlayer dielectric contacts the abrasive. Rotational movement of the wafer relative to the table facilitates removal of the protruding portions of the interlayer dielectric by the abrasive. Post-planarization step height variation is minimized by simultaneously cooling the table and the abrasive material during the abrasive or polishing process. By maintaining the table and the abrasive at about 10 degrees Celsius the step height variation is reduced by a factor of 2 over that normally realized in the prior art.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.