Floating gate type semiconductor memory device
US5107313A · kind A · utility
5Cited by
1References
1Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 6, 1988 |
| Grant date | Apr 21, 1992 |
| Priority date | — |
| Expiry date | Oct 6, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An EPROM as a nonvolatile semiconductor memory device includes a semiconductor substrate 1, a gate oxide layer 3 formed on the surface of the semiconductor substrate 1, a plurality of floating gates 4a and 4b formed on the gate oxide layer 3 so as to overlap one another at the portions 4ab thereof with a gate oxide layer 14 sandwiched between the overlapping portions 4ab, and control gate strips 5 formed on a gate oxide layer 6 which overlies the floating gates 4a and 4b.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.