Semiconductor device with optimal distance between emitter and trench isolation
US5109263A · kind A · utility
6Cited by
5References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 24, 1990 |
| Grant date | Apr 28, 1992 |
| Priority date | — |
| Expiry date | Jul 24, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/177
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A vertical bipolar transistor arrangement in which the distance between the emitter and the isolation region is kept within a range determined by the sum of emitter depth and base width (i.e., the thickness of the base in the depth direction). This keeps the carriers given by the emitter from getting trapped inside, thereby preventing the cut-off frequency from dropping.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.