Electrically page erasable and programmable read only memory
US5109361A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 4, 1990 |
| Grant date | Apr 28, 1992 |
| Priority date | — |
| Expiry date | Jan 4, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electrically page erasable and programmable read only memory device is an EEPROM device which is erasable page by page, and consists of flash-type floating gate transistors as the memory cells. The memory cell array of the device is divided by a plurality of pages, wherein each page comprises a plurality of bit lines, a plurality of common source lines, and a plurality of word lines. A plurality of erase selection circuits are arranged and correspond to the respective pages in order to erase the cells in a selected page, wherein each erase selection circuit comprises a passing transistor, a gate, a voltage stabilizing transistor, and an erasing line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.