Process and apparatus for double-sided chemomechanical polishing of semiconductor wafers and semiconductor wafers obtainable thereby
US5110428A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 4, 1990 |
| Grant date | May 5, 1992 |
| Priority date | — |
| Expiry date | Sep 4, 2010 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/21
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
Semiconductor wafers, in particular, silicon wafers, with differently poled front and rear sides and high geometrical quality can be fabricated by double-sided polishing if the wafer surfaces are differently polarized during the polishing process. This can be achieved in a simple fashion, in that during polishing, an electric field is set up between the upper and lower polishing plates. This can be accomplished by providing the upper polishing plate between the plate surface and the polishing cloth with a thin conductive layer insulated with respect thereto, on which a voltage can be impressed, while both polishing plates are grounded to the frame.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.