Single chip communication data processor with direct memory access controller having a channel control circuit
US5111425A · kind A · utility
46Cited by
9References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 16, 1990 |
| Grant date | May 5, 1992 |
| Priority date | — |
| Expiry date | Jan 16, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a DMA controller incorporated in a data processor, comprising a plurality of channels and a control circuit for overseeing these channels. Each of these channels has registers for storing transfer parameters (address and byte count), registers for storing control parameters (status and command), data assembler circuit, and a channel control circuit that controls these registers and data assembler circuits. The channel control circuit in each channel simultaneously processes transfer parameters for an increased data transmission rate and a reduction of the internal processing unit work load.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.