Reduced size accurate solid-state camera having low power consumption
US5113263A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 27, 1990 |
| Grant date | May 12, 1992 |
| Priority date | — |
| Expiry date | Dec 27, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/1538
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A reduced size solid state camera includes an array of detectors having reading circuits and electronic row and column scanning circuits utilizing CCD-type structures. Each of the column scanning circuits has an integrated part adjacent the detectors with a spacing equal to or smaller than that of the rows of detectors. The movement of the image to be photographed takes place in a direction perpendicular to the columns of detectors and may occur in two successive opposite directions. A scanning circuit for the row supplies a signal representing an image for each image movement direction. The circuitry includes a signal processor which sums up the signals corresponding to the same element of the image that has moved passed all of the detectors of a row.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.